1 rh1011 voltage comparator the rh1011 is a general purpose comparator with signifi- cantly better input characteristics than the lm111. al- though pin compatible with the lm111, it offers four times lower bias current, six times lower offset voltage and five times higher voltage gain. the wafer lots are processed to linear technology? in- house class s flow to yield circuits usable in stringent military applications. supply voltage (pin 8 to pin 4) ............................... 36v output to negative supply (pin 7 to pin 4) ............. 35v ground to negative supply (pin 1 to pin 4) ............ 30v differential input voltage ....................................... 35v voltage at strobe pin (pin 6 to pin 8) .................... 5v input voltage (note 1) ....................... equal to supplies output short-circuit duration ............................. 10 sec operating temperature range (note 2) ........................................... 55 c to 125 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c absolute m axi m u m ratings w ww u descriptio n u + 15v 15v 2 3 200 1.3k 50k 50k 50k 4 1 8 7 5 + 15v 2v ?5v rh1011 bi 3 2 100k 4 1 7 604 8 package i for atio u u w top view v + balance/ strobe gnd input output balance +input v 8 7 6 5 2 1 4 h package 8-lead to-5 metal can + 3 top view w package 10-lead cerpac 1 2 3 4 5 10 9 8 7 6 gnd +input input nc v v + output nc + balance/ strobe balance 1 2 3 4 8 7 6 5 top view gnd +input ?nput v v + output j8 package 8-lead cerdip balance/ strobe balance or bur -i circuit uu , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
2 rh1011 ?5 c t a 125 c (preirradiation) (note 10) table 1: electrical characteristics t a = 25 c sub- sub- symbol parameter conditions notes min typ max group min typ max group units v os input offset voltage 3 1.5 1 3.0 2,3 mv r s 50k 4 2.0 1 3.0 2,3 mv i os input offset current 3,4 4 1 20 2,3 na i b input bias current 3 50 1 80 2,3 na 4 65 1 80 2,3 na v os input offset voltage drift t min t t max 5,9 25 v/ c t a vol large signal voltage gain v s = 15v, r l = 1k , 200 4 v/mv 10v v out 14.5v v s = 5v, r l = 500 , 50 4 v/mv 0.5v v out 4.5v cmrr common mode rejection 90 1 db ratio input voltage range v s = 15v 8,9 14.5 13 14.5 13 v v s = single 5v 8,9 0.5 3.0 0.5 3.0 v t d response time 6,9 250 ns v ol output saturation voltage v in = ?mv, i sink = 8ma 11 0.4 1 0.5 2,3 v i sink = 50ma 1.5 1 1.5 2,3 v output leakage current v in = 5mv, v gnd = 15v, 10 1 500 2,3 na v out = 20v positive supply current 11 4.0 1 ma negative supply current 11 2.5 1 ma strobe current minimum to ensure output 7,9,11 500 a transistor is turned off input capacitance 6 pf 10krad(si) 20krad(si) 50krad(si) 100krad(si) 200krad(si) symbol parameter conditions notes min max min max min max min max min max units v os input offset voltage 1.5 1.5 1.5 2.5 4 mv i os input offset current 4 4 4 20 50 na i b input bias current 50 100 150 200 300 na a vol large-signal voltage r l = 1k , 200 200 150 100 50 v/mv gain 10v v out 14.5v cmrr common mode 90 90 90 90 86 db rejection ratio input voltage range v s = 15v 8,9 14.5 13 14.5 13 14.5 13 14.5 13 14.5 13 v v s = single 5v 0.5 3.0 0.5 3.0 0.5 3.0 0.5 3.0 0.5 3.0 v v ol output saturation v in = ?mv, i sink = 8ma 11 0.4 0.4 0.4 0.4 0.4 v voltage i sink = 50ma 1.5 1.5 1.5 1.5 1.5 v output leakage v in = 5mv, v gnd = 15v 10 10 100 100 100 na current v out = 20v table 1a: electrical characteristics (postirradiation) (note 10)
3 rh1011 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. table 1a: electrical characteristics 10krad(si) 20krad(si) 50krad(si) 100krad(si) 200krad(si) symbol parameter conditions notes min max min max min max min max min max units positive supply current 11 4.0 4.0 4.0 4.0 4.0 ma negative supply current 11 2.5 2.5 2.5 2.5 2.5 ma strobe current minimum to ensure output 7,9,11 500 500 500 500 500 a transistor is turned off input capacitance 6 (typ) 6 (typ) 6 (typ) 6 (typ) 6 (typ) pf (postirradiation) (note 10) mil-std-883 test requirements subgroup final electrical test requirements (method 5004) 1*,2,3,4 group a test requirements (method 5005) 1,2,3,4 group b and d end point electrical parameters 1,2,3 (method 5005) * pda applies to subgroup 1. see pda test notes. pda test notes the pda is specified as 5% based on failures from group a, subgroup 1, tests after cooldown as the final electrical test in accordance with method 5004 of mil-std-883 class b. the verified failures (including delta parameters) of group a, subgroup 1, after burn-in divided by the total number of devices submitted for burn-in in that lot shall be used to determine the percent for the lot. linear technology corporation reserves the right to test to tighter limits than those given. table 2: electrical test require e ts u w note 1: inputs may be clamped to supplies with diodes so that maximum input voltage actually exceeds supply voltage by one diode drop. see input protection discussion in the lt 1011 data sheet. note 2: t jmax = 150 c. note 3: output is sinking 1.5ma with v out = 0v. note 4: these specifications apply for all supply voltages from a single 5v to 15v, the entire input voltage range and for both high and low output states. the high state is i sink = 100 a, v out = (v + ?1v) and the low state is i sink = 8ma, v out = 0.8v. therefore, this specication defines a worst- case error band that includes effects due to common mode signals, voltage gain and output load. note 5: drift is calculated by dividing the offset difference measured at minimum and maximum temperatures by the temperature difference. note 6: response time is measured with a 100mv step and 5mv overdrive. the output load is a 500 resistor tied to 5v. time measurement is taken when the output crosses 1.4v. note 7: do not short the strobe pin to ground. it should be current driven at 3ma to 5ma for the shortest strobe time. currents as low as 500 a will strobe the rh1011 if speed is not important. external leakage on the strobe pin in excess of 0.2 a when the strobe is ?ff can cause offset voltage shifts. note 8: see graph, input offset voltage vs common mode voltage on the lt1011 data sheet. note 9: guaranteed by design, characterization or correlation to other tested parameters. note 10: v s = 15v, v cm = 0v, r s = 0 , t a = 25 c, v gnd = v , output at pin 7, unless otherwise noted. note 11: v gnd = 0v. + 12v 5.1k ?2v rh1011 tdbc 2 3 4 1 7 8 12 12 5.1k total dose bias circuit
4 rh1011 ? linear technology corporation 1989 lt/lt 0308 rev d ?printed in usa i.d. no. 66-10-0159 rev. d 0308 typical perfor m a n ce characteristics uw input offset voltage input offset current input bias current total dose krad (si) 1 input offset voltage (mv) 8 6 4 2 0 ? ? ? 10 100 1000 rh1011 g01 v s = 15v r s = 0 v cm = 0v (3 typical units) total dose krad (si) 1 input bias current (na) 300 200 100 0 10 100 1000 rh1011 g02 v s = 15v v cm = 0v total dose krad (si) 1 input offset current (na) 30 20 10 0 ?0 ?0 ?0 ?0 10 100 1000 rh1011 g03 v s = 15v v cm = 0v voltage gain common mode rejection ratio total dose krad (si) 1 voltage gain (v/mv) 700 600 500 400 300 200 100 0 10 100 1000 rh1011 g04 v s = 15v r l = 1k v cm = 0v total dose krad (si) 1 common mode rejection ratio (db) 130 120 110 100 90 80 70 60 10 100 1000 rh1011 g05 v s = 15v v cm = ?4.5v to 13v linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com
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